Second-Order Lead Lag (LDL2)

This information applies to the CompactLogix 5370, ControlLogix 5570, Compact GuardLogix 5370, GuardLogix 5570, Compact GuardLogix 5380, CompactLogix 5380, CompactLogix 5480, ControlLogix 5580, and GuardLogix 5580 controllers.
The LDL2 instruction provides a filter with a pole pair and a zero pair. The frequency and damping of the pole and zero pairs are adjustable. The pole or zero pairs can be either complex (damping less than unity) or real (damping greater than or equal to unity).
Available Languages
Ladder Diagram
This instruction is not available in ladder diagram logic.
Function Block
RSL5K_LDL2 Function Block_v31
Structured Text
LDL2(LDL2_tag);
Operands
Function Block
Operand
Type
Format
Description
LDL2 tag
LEAD_LAG_SEC_ORDER
Structure
LDL2 structure
LEAD_LAG_SEC_ORDER Structure
Input Parameter
Data Type
Description
EnableIn
BOOL
Enable input. If false, the instruction does not execute and outputs are not updated.
Default is true.
In
REAL
The analog signal input to the instruction.
Valid = any float
Default = 0.0
Initialize
BOOL
Request to initialize filter control algorithm. When true, the instruction sets Out = In.
Default is cleared.
WLead
REAL
The lead corner frequency in radians/second. If WLead < minimum or WLead > maximum, the instruction sets the appropriate bit to true in Status and limits WLead. If the WLag:WLead ratio > maximum ratio, the instruction sets the appropriate bit in Status to true and limits WLag
Valid = see Description section below for valid ranges.
Default = 0.0
WLag
REAL
The lag corner frequency in radians/second. If WLag < minimum or WLag > maximum, the instruction sets the appropriate bit to true in Status and limits WLag. If the WLag:WLead ratio > maximum ratio, the instruction sets the appropriate bit to true in Status and limits WLag.
Valid = see Description section below for valid ranges
Default = 0.0
ZetaLead
REAL
Second order lead damping factor. Only used when Order = 2. If ZetaLead < minimum or ZetaLead > maximum, the instruction sets the appropriate bit to true in Status and limits ZetaLead.
Valid = 0.0 to 4.0
Default = 0.0
ZetaLag
REAL
Second order lag-damping factor. Only used when Order = 2. If ZetaLag < minimum or ZetaLag > maximum, the instruction sets the appropriate bit to true in Status and limits ZetaLag.
Valid = 0.05 to 4.0
Default = 0.05
Order
REAL
Order of the filter. Selects the first or second order filter algorithm. If invalid, the instruction sets the appropriate bit to true in Status and uses Order = 2.
Valid = 1 to 2
Default = 2
TimingMode
DINT
Selects timing execution mode.
0 = Periodic mode
1 = Oversample mode
2 = Real time sampling mode
Valid = 0 to 2
Default = 0
RTSTimeStamp
DINT
Module time stamp value for real time sampling mode.
Valid = 0 to 32,767ms
Default = 0
Output Parameter
Data Type
Description
EnableOut
BOOL
Indicates if instruction is enabled. Cleared to false if Out overflows.
Out
REAL
The calculated output of the algorithm.
DeltaT
REAL
Elapsed time between updates. This is the elapsed time in seconds used by the control algorithm to calculate the process output.
Status
DINT
Status of the function block.
InstructFault (Status.0)
BOOL
The instruction detected one of the following execution errors. This is not a minor or major controller error. Check the remaining status bits to determine what occurred.
WLeadInv (Status.1)
BOOL
WLead < minimum value or WLead > maximum value.
WLagInv (Status.2)
BOOL
WLag < minimum value or WLag > maximum value.
ZetaLeadInv (Status.3)
BOOL
Lead damping factor < minimum value or lead damping factor > maximum value.
ZetaLagInv (Status.4)
BOOL
Lag damping factor < minimum value or lag damping factor > maximum value.
OrderInv (Status.5)
BOOL
Invalid Order value.
WLagRatioInv (Status.6)
BOOL
WLag:WLead ratio greater than maximum value.
TimingModeInv (Status.27)
BOOL
Invalid TimingMode value.
For more information about timing modes, see Function Block Attributes.
RTSMissed (Status.28)
BOOL
Only used in real time sampling mode. Set when
ABS (DeltaT - RTSTime) > 1 millisecond.
RTSTimeInv (Status.29)
BOOL
Invalid RTSTime value.
RTSTimeStampInv (Status.30)
BOOL
Invalid RTSTimeStamp value.
DeltaTInv (Status.31)
BOOL
Invalid DeltaT value.
Structured Text
Operand
Type
Format
Description
LDL2 tag
LEAD_LAG_SEC_ORDER
structure
LDL2 structure
See Structured Text Syntax for more information on the syntax of expressions within structured text.
Description
The LDL2 instruction filter is used in reference forcing and feedback forcing control methodologies. The LDL2 instruction is designed to execute in a task where the scan rate remains constant.
The LDL2 instruction uses these equations:
When:
The instruction uses this Laplace transfer function:
Order = 1
LDL2 Equation for Order 1
Order = 2
LDL2 Order 2A
LDL2 Normalize the Filter
LDL2 Equation for Order 2
with these parameter limits (where DeltaT is in seconds):
Parameter
Limitations
WLead first order
LowLimit
LDL2 WLead first order
WLead second order
LowLimit
LDL2 WLead second order
HighLimit
LDL2 HighLimit
WLead:WLag ratio
If WLead > WLag, no limitations
If WLag > WLead:
  • No minimum limitation for WLag:WLead
  • First order maximum for WLag:WLead = 40:1 and the instruction limits WLag to enforce this ratio
  • Second order maximum for WLag:WLead = 10:1 and the instruction limits WLag to enforce this ratio
ZetaLead second order only
LowLimit = 0.0
HighLimit = 4.0
ZetaLag second order only
LowLimit = 0.05
HighLimit = 4.0
Whenever the value computed for the output is invalid, NAN, or Plus or Minus sign INF, the instruction sets Out = the invalid value. When the value computed for the output becomes valid, the instruction initializes the internal parameters and sets Out = In.
Affects Math Status Flags
No
Major/Minor Faults
None specific to this instruction. See Common Attributes for operand-related faults.
Execution
Function Block
Condition/State
Action Taken
Prescan
EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is false
EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is true
EnableIn and EnableOut bits are set to true.
The instruction executes.
Instruction first run
N/A
Instruction first scan
Recalculate coefficients.
Postscan
EnableIn and EnableOut bits are cleared to false.
Structured Text
Condition/State
Action Taken
Prescan
See Prescan in the Function Block table.
Normal Execution
See Tag.EnableIn is true in the Function Block table.
Postscan
See Postscan in the Function Block table.
Example
The LDL2 instruction can attenuate between two frequencies or can amplify between two frequencies, depending on how you configure the instruction. Since the Lead and Lag frequencies can be set to values that are larger or smaller than each other, this instruction may behave as a Lead-Lag block, or, as a Lag-Lead block, depending on which frequency is configured first. Note that higher orders increase the execution time for the filter instruction.
This example is the minimal legal programming of the LDL2 function block and is only used to show the neutral text and generated code for this instruction. This is for internal purposes only and is not a testable case.
Filter
Graph
1st order lead-lag
(wLead < wLag)
LDL2 First Order Graph A
2nd order lead-lag
(wLead < wLag)
LDL2 Second order graph
1st order lead-lag
(wLag < wLead)
LDL2 First Order Graph B
2nd order lead-lag
(wLag < wLead)
LDL2 Second Order Graph B
Function Block
RSL5K_LDL2 Function Block Example_v31
Structured Text
LDL2_01.In := frequency_input;
LDL2_01.WLead :=
Lead_frequency;
LDL2_01.WLag := Lag_frequency;
LDL2(LDL2_01);
Lead_lag_output := LDL2_01.Out;
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